Full HD Video FIFO, the Fastest and Highest Density in the World

AverLogic's Full HD FIFO (First-In-First-Out) Memory íV AL460A-PBF is ready to sample.
The AL460A-PBF consists of 128Mbit of memory density, and is configured as 8,192K x 16 bits FIFO, the optimized access scheme offers maximum R/W operating speed up to 150 MHz. The FIFO offers a simple and easy-to-use user interface supporting usage in a wide range of applications, such as Multimedia systems, video capture systems, and various video data buffering applications.

  Video/Audio Broadcast Market
- HDTV/SDTV video capture/editing system
- Multiple source/format switcher
- Scan rate converter
- IPTV Set-Top-Box
- Image manipulation
- Video Wall
  Camera Processing Market
- HD video frame synchronizer
- Studio camera
- PIP image buffering
  Video Surveillance market
- Multi-window video merging
- HD camera data buffering
  Medical imaging system market
- Image grabber
- Image buffering & enhancement processor
  Industrial Instrument market
- Data Synchronizer
- Time Base Correction (TBC)
- Buffer for communication systems
  • 128Mbit density configured as 8M x 16-bit input and output data bus width
  • Supports video NTSC, PAL and HDTV up to 1080p resolutions
  • Independent 16-bit read/write data bus operations (different I/O data rates acceptable)
  • High speed synchronous sequential access in maximum speed 150Mhz
  • Input/Output enable control
  • Supports double buffer mode (Upper and Lower frame access with 4M x16-bit in each frame) via frame-select pins
  • Polarity Selectable
  • 2.5V and 3.3V power supply
  • Standard LQFP-128 package

What are the advantages of using AL460A-PBF FIFO?

    AverLogic's Full-HD (High-Definition) FIFO, AL460A-PBF, can capture up-to three full 1080p frames running at 150mhz high speed clock rate in 16 bits width of data bus. The AL460A-PBF can be applied to a wide range of video (SD/HD) and graphics applications. Designers can benefit from using the AL460A-PBF FIFO with its simple bus interface to reduce implementation and debugging efforts, improving time-to-market, and reducing engineering costs. Other advantage of using FIFOs are
  • Limited glue logic required
  • Reduces timing constraints in the system
  • Easy expansion to accommodate varying word widths (memory depth cascading)
  • Easy-to-use bus interface and bus expansion to accommodate varying bus interfaces (bus width cascading)

Streaming iPod & 192KHz Audio on Power-line Reference Design

Home A/V Network via Ethernet/Powerline Reference Design

Audio/Video plus Ethernet Extension via Powerline Reference Design

MPEG-4 Network TV/Video Server Reference Design

MPEG-4/2/1 A/V USB 2.0 Grabber Reference Design

In-Car DVR Application Reference Design

Video Decoding
Video Decoder
Video Frame/ Line FIFO
Video FIFO and Specialty Memory
Small-to-Medium Sized LCD Display
LCD Display Controller
Video Format Converter
Video Conversion ICs
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